Electrodeposition of copper is a standard deposition technique used for copper interconnect applications. However, copper cannot be electroplated directly onto diffusion barrier materials without a thin copper seed layer. In current processes, the copper seed layers are deposited by Physical Vapor Deposition (PVD) for this purpose, often by derivative techniques of ionized PVD (I-PVD). However, in future semiconductor generations, a very conformal film deposition in nanoscale, high aspect ratio structures will be required. This may only be achievable only by Atomic Layer Deposition (ALD) techniques. As an alternative, copper electrodeposition can be also done on other low-resistance metal surfaces. The required material properties for this purpose include nobility, formation of soluble or conducting oxides, and insolubility in the copper bath. Preferably, direct plating materials have good diffusion barrier properties as well as good adhesion to dielectrics. A few metal layers have been identified as candidates, which are generally refractory metals such as Ru, Rh, Co, Mo, Cr, and W.
Recently, ruthenium is receiving attention as a directly plateable material due to its good properties as an electrode in DRAM applications, as a metal gate for CMOS applications, and its application as a seed layer for direct plating of copper using an electroplating process.
Ruthenoscene (or ruthenium cyclopentadienyl, Ru(C5H5)2), otherwise known as Ru(Cp)2, has been used as a metal precursor which is reacted with molecular oxygen to produce ruthenium thin films by ALD. Polycrystalline ruthenium films with quite low resistivity (12–13 μΩcm) were obtained with low impurity levels. However, due to a nucleation problem associated with the metal organic ruthenium precursor, only a very limited, non-uniform deposition occurs on some dielectric surfaces, including silicon dioxide (SiO2). To overcome this problem, the prior art used an in situ grown aluminum oxide (Al2O3) layer before ALD of ruthenium. There has been no know solution for direct deposition of ruthenium by ALD on SiO2 and other dielectric surfaces. Even for CVD of ruthenium on oxides, it is a common practice to first deposit a ruthenium seed layer by PVD. For the implementation of ruthenium by ALD to device processing, especially for direct plating and metal gate purpose, some way of depositing metallic ruthenium films directly on to dielectrics is essential.
Due to the RC delay in nanoscale integrated circuits, novel low dielectric constant (low k) materials are being introduced. It has been widely known that vapor phase deposition including chemical vapor deposition (CVD) and ALD generally have nucleation problems on these low k dielectrics. However, as the required film thickness of liner materials, including direct plating liners, is getting thinner as the device scaling entering sub-100 nanometer technological node size, a nucleation problem could be a potentially serious matter. Thus, various surface treatment technique to deposit metal thin films on dielectrics without nucleation during the ALD of ruthenium is essential for implementing ALD of metals as direct plating applications, as well as liner applications, in the BEOL area.
In another application of ruthenium ALD, the metal gate process require direct deposition of ruthenium on thin SiO2 or high k materials. Ruthenium has been considered one of candidates for the metal gate of dual gate CMOS devices due to its work function having the proper value.